399d5cf532
Some of our local patches have been accepted upstream. And there are some more relevant changes (mostly for rt2800usb). Import them and rebase our remaining local patches on top. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
63 lines
2.2 KiB
Diff
63 lines
2.2 KiB
Diff
From 0094872a5e8e4664c6ea1b2dfa487063d39ae363 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Sun, 24 Mar 2013 19:26:26 +0100
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Subject: [PATCH] rt2x00: rt2800lib: add MAC register initialization for
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RT3883
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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drivers/net/wireless/ralink/rt2x00/rt2800.h | 14 ++++++++++++++
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drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 19 ++++++++++++++++---
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2 files changed, 30 insertions(+), 3 deletions(-)
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--- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
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@@ -1727,6 +1727,20 @@
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#define TX_PWR_CFG_9B_STBC_MCS7 FIELD32(0x000000ff)
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/*
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+ * TX_TXBF_CFG:
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+ */
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+#define TX_TXBF_CFG_0 0x138c
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+#define TX_TXBF_CFG_1 0x13a4
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+#define TX_TXBF_CFG_2 0x13a8
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+#define TX_TXBF_CFG_3 0x13ac
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+
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+/*
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+ * TX_FBK_CFG_3S:
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+ */
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+#define TX_FBK_CFG_3S_0 0x13c4
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+#define TX_FBK_CFG_3S_1 0x13c8
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+
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+/*
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* RX_FILTER_CFG: RX configuration register.
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*/
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#define RX_FILTER_CFG 0x1400
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--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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@@ -5485,6 +5485,12 @@ static int rt2800_init_registers(struct
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rt2800_register_write(rt2x00dev, TX_SW_CFG2,
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0x00000000);
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}
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+ } else if (rt2x00_rt(rt2x00dev, RT3883)) {
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+ rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000402);
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+ rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
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+ rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00040000);
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+ rt2800_register_write(rt2x00dev, TX_TXBF_CFG_0, 0x8000fc21);
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+ rt2800_register_write(rt2x00dev, TX_TXBF_CFG_3, 0x00009c40);
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} else if (rt2x00_rt(rt2x00dev, RT5390) ||
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rt2x00_rt(rt2x00dev, RT5392) ||
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rt2x00_rt(rt2x00dev, RT6352)) {
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@@ -5698,6 +5704,11 @@ static int rt2800_init_registers(struct
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reg = rt2x00_rt(rt2x00dev, RT5592) ? 0x00000082 : 0x00000002;
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rt2800_register_write(rt2x00dev, TXOP_HLDR_ET, reg);
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+ if (rt2x00_rt(rt2x00dev, RT3883)) {
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+ rt2800_register_write(rt2x00dev, TX_FBK_CFG_3S_0, 0x12111008);
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+ rt2800_register_write(rt2x00dev, TX_FBK_CFG_3S_1, 0x16151413);
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+ }
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+
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rt2800_register_read(rt2x00dev, TX_RTS_CFG, ®);
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rt2x00_set_field32(®, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 7);
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rt2x00_set_field32(®, TX_RTS_CFG_RTS_THRES,
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